The memory hides behind the mirror
The memory hides behind the mirror
Ordinary memory makes you choose. Either it is fast, and forgets the instant the current stops, or it is durable, and pays for that durability in every read and every write — slow, wearing a little thinner with each cycle, the price of permanence charged constantly instead of once. NOVRAM refuses to choose. It builds two memories where other designs build one, and lets each cell live the life better suited to it: an SRAM latch on the surface, switching at the speed of the circuit around it, indifferent to wear, forgetting nothing so long as it is fed; and behind that latch, wired to it directly, an EEPROM cell that never has to move until the one moment that matters.
That moment is the failure itself. When the supply rail sags, a small circuit senses it before the logic dies, and in the narrow window bought by a capacitor's remaining charge, the chip performs one act: it copies the SRAM's present state into the EEPROM's keeping, cell by cell, in parallel, faster than the power can finish draining. The working memory does not know it is being rescued. It simply holds its value one instant longer than the power that was sustaining it — long enough to be mirrored into the medium built to survive the dark.
On the next power-up, the motion reverses without needing to be told to. The EEPROM writes back into the SRAM before anything else in the circuit wakes, and the fast memory finds itself already populated, already exactly where it left off, as though the outage were an edit that never happened. No wear accumulates on the EEPROM side except at the true edges of continuity — the losses, the restorations — because ordinary operation never touches it at all. The chip gets the SRAM's tirelessness for every ordinary cycle and the EEPROM's permanence for the one cycle that would otherwise erase everything: two kinds of memory, each doing only the part of the job it was actually built for.