When a machine is first given power, the voltage does not arrive instantly. It ramps up, climbing a slope from zero to operational threshold. During this climb, the logic gates are starved, their thresholds undefined, their states chaotic. If they were allowed to begin calculating immediately, they would write random noise into memory and initiate unpredictable, destructive actions.
The power-on reset (POR) circuit prevents this. It is a dedicated, ultra-low-voltage monitor whose only job is to hold the entire system in a state of forced paralysis. It clamps the reset line down, refusing to let the processor take its first step until the voltage rail has fully stabilized at a safe, deterministic level.
The machine is given power, but it is denied agency. It must be held motionless until it is strong enough to be sane.
